1. Field of the Invention
The present invention relates to switching regulators.
2. Description of Related Art
Methods for controlling switching power supply devices (switching regulators) that stabilize the output voltage by varying the duty ratio of the switching signal according to extraneous disturbances such as variation of the input voltage and variation of the output current divide roughly into those relying on voltage mode control and those relying on current mode control. In general, methods relying on current mode control are highly effective in terms of simple phase compensation, fast response, and reduced numbers of externally fitted components. An example of a common configuration of a current-mode-control switching power supply device is shown in FIG. 11.
The switching power supply device 100 shown in FIG. 11 performs current mode control by sensing the current through a low-side MOS (metal-oxide semiconductor) transistor Q2. Through the current mode control, a high-side MOS transistor Q1 and the low-side MOS transistor Q2 are turned ON and OFF complementarily, and by this switching operation, an input voltage VIN is converted into a pulsating switching voltage VSW. The switching voltage VSW is then smoothed by an inductor L1 and a output capacitor C1, and is thereby converted into an output voltage VOUT lower than the input voltage VIN.
For example, in switching power supply devices for vehicle-mounted applications, fast switching operation at 2 MHz or more is required to avoid producing noise in the AM radio frequency band. In the switching power supply device 100 shown in FIG. 11, suppose, for example, the input voltage VIN is set at 48 [V], the output voltage VOUT at 3.3 [V], and the switching frequency f at 2 [MHz], then the pulse width W of the switching voltage VSW during stable operation equals 34 [ns] as given by the following formula.
  W  =                    1        f            ×                        V          OUT                          V                      I            ⁢                                                  ⁢            N                                =                            1                      2            ⁢                                                  [            MHz            ]                          ×                              3.3            ⁢                                                  [            V            ]                                48            ⁢                                                  [            V            ]                              =              34        ⁢                                  [        ns        ]            
In the switching power supply device 100 shown in FIG. 11, overcurrent protection operation is performed based on an overcurrent sense signal OC that is generated when an overcurrent through the high-side MOS transistor Q1 is sensed. However, with the settings noted above, the period in which the high-side MOS transistor Q1 is ON lasts as little as 34 [ns], making it impossible to sense an overcurrent through the high-side MOS transistor Q1.
Incidentally, like the switching power supply device 100 shown in FIG. 11, the current-mode-control switching power supply device disclosed in Japanese Patent Application published as No. 2014-003850 performs overcurrent protection operation by sensing an overcurrent through a high-side switching device, and thus suffers from a similar problem.
One approach to solve the problem is to modify the configuration so that overcurrent protection operation is performed based on an overcurrent through a low-side MOS transistor Q2. When an overcurrent is being sensed, the output voltage VOUT of the switching power supply device 100 is low; thus, unless a limit is provided for the pulse width W of the switching voltage VSW, when the high-side MOS transistor Q1 is turned ON on recovery from the overcurrent, the ON period of the high-side MOS transistor Q1 is prolonged without a limit. To avoid that, a configuration is added whereby, when the output voltage VOUT is low, the pulse width W of the switching voltage VSW is limited. Here, an overcurrent state can be either a state where the overcurrent results from a short circuit in the load or a state where it results from a short circuit at the connection node between the high-side and low-side MOS transistors Q1 and Q2. In the state where the overcurrent results from a short circuit at the connection node between the high-side and low-side MOS transistors Q1 and Q2, no current is present through the low-side MOS transistor Q2. Thus, with a configuration that performs overcurrent protection operation based solely on an overcurrent through the low-side MOS transistor Q2, it is not possible to detect a state where an overcurrent results from a short circuit at the connection node between the high-side and low-side MOS transistors Q1 and Q2. That is, in a state where an overcurrent results from a short circuit in the load, the pulse width W of the switching voltage VSW is limited and in addition an overcurrent through the low-side MOS transistor Q2 is sensed; in contrast, in a state where an overcurrent results from a short circuit at the connection node between the high-side and low-side MOS transistors Q1 and Q2, the pulse width W of the switching voltage VSW is limited but no overcurrent through the low-side MOS transistor Q2 is sensed. Performing overcurrent protection operation in a state where the pulse width W of the switching voltage VSW is limited but no overcurrent through the low-side MOS transistor Q2 is sensed requires a technology that enables overcurrent protection operation without direct of a sensing result from a current sensing device. Incidentally, any technology that enables fault protection operation without direct use of a sensing result from a sensing device for sensing a physical quantity, not limited to an overcurrent as described above, as the target of fault detection would be highly useful.